The International Symposium on Asynchronous Circuits and Systems (ASYNC) will be held during July 16-19, 2023 in Beijing, China, which provides a high quality forum for researchers and engineers from academia and industry to present their latest insights and results in Asynchronous VLSI designs. The conference is hosted by Tsinghua University. This is the first time for the conference to be held in China. Asynchronous circuits are event-driven, whose benefits include low power and high energy efficiency. Asynchronous design plays an important role in massive core distributed systems, low power and high energy efficiency circuits and systems, neuromorphic circuits and systems and so on. Authors are invited to submit their papers on all aspects of asynchronous designs.

now. Your virtual attendance is warmly welcomed.

Important Dates

Paper Type	Items	Submission Deadline
Regular Papers	Abstract Registration	20 February, 2023    28 February, 2023
	Full Paper Submission	27 February, 2023    7 March, 2023
	Notification of Acceptance	18 April, 2023             27 April, 2023
	Final Version	9 May, 2023                 18 May, 2023
Industrial Papers (Tool & Demos) Fresh Idea Papers Posters	Paper Submission	30 April, 2023             9 May, 2023
	Notification of Acceptance	14 May, 2023             18 May, 2023
	Final Version	28 May, 2023

The topics included but not limited to below:

Asynchronous pipelines, architectures, CPUs, and memories;

Asynchronous ultra-low power systems, energy harvesting and mixed-signal/analogue circuits and systems;

Asynchrony in emerging technologies, including bio, neural, nano, and quantum computing;

CAD tools for asynchronous design, synthesis, analysis, and optimization;

Formal methods for verification and performance/power analysis;

Test, security, fault tolerance, and radiation hard design;

Asynchronous variability-tolerant design, resilient design, and design for manufacturing;

Asynchronous design for neural networks and machine learning applications;

Circuit designs, case studies, comparisons, and applications;

Mixed-timed circuits, clock domain crossing, GALS systems, Network-on-Chip, and multi-chip interconnects;

Hardware implementations of asynchronous models and algorithms, asynchronous techniques in clocked designs, and elastic and latency-tolerant synchronous design;

Circuit designs, case studies, comparisons, and applications.

Click to know how to submit a paper to ASYNC 2023.

Important Notes

[July 1, 2023] Good News: The online attendance registration is OPEN now. You can visit HERE for further registration.

[March 31, 2023] All types of Chinese visas, including tourist visas, are available starting from March 15, 2023. Additionally, entry functions for visas issued before March 28, 2020 and still valid have been restored. Individuals arriving in China from abroad are no longer required to quarantine or take a PCR test upon arrival. However, they are still required to present a negative test result taken within 48 hours before departure. For more detailed information, please consult the embassy of the People's Republic of China in your country.

[February 27, 2023] The conference encourages onsite attendance for further communication. But if there is any ever-changing international and domestic travel restrictions, we will provide possibility of on-line presentation.

[January 31, 2023] COVID-19 testing and centralized isolation for all overseas travelers entering China have been canceled. Travelers to China are required to take a nucleic acid test 48 hours before departure and those with negative results can enter the country without having to apply for a green health code from Chinese embassies and consulates abroad. For more detailed information, please consult the embassy of the People's Republic of China in your country.